Robert R. Robison

Stacked nanosheet gate-all-around transistor to enable scaling beyond FinFET

N. Loubet, Terence B. Hook, P. Montanini et al. · 2017 · 939 citations

Engineering, Nanocomputing, Semiconductor Device +17

High performance 14nm SOI FinFET CMOS technology with 0.0174µm<sup>2</sup> embedded DRAM and 15 levels of Cu metallization

C-H. Lin, B. Greene, J. Cai et al. · 2014 · 128 citations

Full Bottom Dielectric Isolation to Enable Stacked Nanosheet Transistor for Low Power and High Performance Applications

J. Zhang, Julien Frougier, Andrew Greene et al. · 2019 · 93 citations

Engineering, Semiconductor Device, Advanced Packaging (Semiconductors) +17

Channel Geometry Impact and Narrow Sheet Effect of Stacked Nanosheet

Chun Wing Yeung, Jingyun Zhang, Robin Chao et al. · 2018 · 91 citations

22nm High-performance SOI technology featuring dual-embedded stressors, Epi-Plate High-K deep-trench embedded DRAM and self-aligned Via 15LM BEOL

P. Chang, C. Ortolland, David Fried et al. · 2012 · 89 citations

High-performance Soi Technology, Engineering, Vlsi Design +16