V. Arnal

Characterization and integration of a CVD porous SiOCH (k<2.5) with enhanced mechanical properties for 65 nm CMOS interconnects and below

L.L. Chapelon, V. Arnal, M. Broekaart et al. · Microelectronic Engineering · 2004 · 36 citations

Materials Science, Electrical Engineering, Engineering +13

Advanced Cu interconnects using air gaps

L.G. Gosset, A. Farcy, J. de Pontcharra et al. · Microelectronic Engineering · 2005 · 30 citations

3D Ic Architecture, Electrical Engineering, Engineering +7

Impact of the Cu-based substrates and catalyst deposition techniques on carbon nanotube growth at low temperature by PECVD

M. Dubosc, S. Casimirius, Marie‐Paule Besland et al. · Microelectronic Engineering · 2007 · 23 citations

Materials Science, Chemical Engineering, Engineering +10

Influence of SiH4 process step on physical and electrical properties of advanced copper interconnects

S. Chhun, L.G. Gosset, N. Casanova et al. · Microelectronic Engineering · 2004 · 23 citations

Materials Science, Electrical Engineering, Electromigration Technique +9

Impact of patterning and ashing on electrical properties and reliability of interconnects in a porous SiOCH ultra low-k dielectric material

M. Aimadeddine, V. Arnal, A. Farcy et al. · Microelectronic Engineering · 2005 · 20 citations · Full text

Materials Engineering, Materials Science, Electrical Engineering +11