Z. Chbili

Modeling Early Breakdown Failures of Gate Oxide in SiC Power MOSFETs

Z. Chbili, Asahiko Matsuda, Jaafar Chbili et al. · IEEE Transactions on Electron Devices · 2016 · 89 citations

Engineering, Electrical Engineering, Materials Science +17

Demonstration of improved heteroepitaxy, scaled gate stack and reduced interface states enabling heterojunction tunnel FETs with high drive current and high on-off ratio

D. K. Mohata, R. Bijesh, Yunhai Zhu et al. · 2012 · 61 citations

Engineering, Electrical Engineering, Materials Science +17

SOI Field-Effect Diode DRAM Cell: Design and Operation

Ahmad Z. Badwan, Z. Chbili, Yang Yang et al. · IEEE Electron Device Letters · 2013 · 56 citations

Engineering, Electrical Engineering, Materials Science +17

Time Dependent Dielectric Breakdown in High Quality SiC MOS Capacitors

Z. Chbili, Kin P. Cheung, J. P. Campbell et al. · Materials science forum · 2016 · 31 citations · Full text

Engineering, Electrical Engineering, Materials Science +17

Device reliability metric for end-of-life performance optimization based on circuit level assessment

A. Kerber, P. Srinivasan, S. Cimino et al. · 2017 · 27 citations

Engineering, Computer Engineering, Electrical Engineering +17