Youssef Travaly

Design Issues and Considerations for Low-Cost 3-D TSV IC Technology

Geert Van der Plas, Paresh Limaye, Igor Loi et al. · IEEE Journal of Solid-State Circuits · 2010 · 308 citations

Engineering, Vlsi Design, 3-D Chip Stacks +17

Short-ranged structural rearrangement and enhancement of mechanical properties of organosilicate glasses induced by ultraviolet radiation

Francesca Iacopi, Youssef Travaly, B. Eyckens et al. · Journal of Applied Physics · 2006 · 133 citations

Optical Materials, Ultraviolet Radiation, Engineering +18

Comprehensive analysis of the impact of single and arrays of through silicon vias induced stress on high-k / metal gate CMOS performance

A. Mercha, Geert Van der Plas, Victor Moroz et al. · 2010 · 119 citations

Engineering, Stress Aware Design, Mechanical Engineering +22

Challenges in the implementation of low-k dielectrics in the back-end of line

R.J.O.M. Hoofman, G.J.A.M. Verheijden, J. Michelon et al. · Microelectronic Engineering · 2005 · 110 citations

Electrical Engineering, Dielectrics, Engineering +10

Integration challenges of copper Through Silicon Via (TSV) metallization for 3D-stacked IC integration

J. Van Olmen, Cedric Huyghebaert, Jan Coenen et al. · Microelectronic Engineering · 2010 · 77 citations

Materials Science, Silicon Via, Electrical Engineering +14