Publication | Closed Access
Integration challenges of copper Through Silicon Via (TSV) metallization for 3D-stacked IC integration
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Citations
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References
2010
Year
Materials ScienceSilicon ViaElectrical EngineeringWafer Scale ProcessingEngineeringAdvanced Packaging (Semiconductors)3D Ic ArchitectureApplied PhysicsIntegration ChallengesChip Attachment3D PrintingElectronic PackagingThree-dimensional Integrated Circuits3D IntegrationInterconnect (Integrated Circuits)3D-stacked Ic IntegrationMicroelectronics
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