K. Arai

Thinned wafer multi-stack 3DI technology

Takayuki Ohba, Nobuhide Maeda, Hideki Kitada et al. · Microelectronic Engineering · 2009 · 94 citations

Natural Sciences, Manufacturing Engineering, Materials Science +12

Advanced wafer thinning technology and feasibility test for 3D integration

Young Seok Kim, Nobuhide Maeda, Hideki Kitada et al. · Microelectronic Engineering · 2013 · 89 citations

Engineering, Manufacturing Engineering, Materials Science +11

Ultra thinning down to 4-µm using 300-mm wafer proven by 40-nm node 2Gb DRAM for 3D multi-stack WOW applications

Y. S. Kim, Shuhei Kodama, Y. Mizushima et al. · 2014 · 33 citations

Engineering, Electrical Engineering, Materials Science +13

Ultra thinning 300-mm wafer down to 7-µm for 3D wafer Integration on 45-nm node CMOS using strained silicon and Cu/Low-k interconnects

Y. S. Kim, A. Tsukune, Noritoshi Maeda et al. · 2009 · 25 citations

Engineering, Electrical Engineering, Materials Science +17

Development of sub 10-µm ultra-thinning technology using device wafers for 3D manufacturing of terabit memory

Noritoshi Maeda, Y. S. Kim, Yukinobu Hikosaka et al. · 2010 · 21 citations

Engineering, Electrical Engineering, Materials Science +16