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Ultra thinning down to 4-µm using 300-mm wafer proven by 40-nm node 2Gb DRAM for 3D multi-stack WOW applications
33
Citations
4
References
2014
Year
Unknown Venue
EngineeringEmerging Memory TechnologyIntegrated Circuits40-Nm Node 2GbWafer Scale ProcessingAdvanced Packaging (Semiconductors)Thickness UniformityElectronic PackagingMulti-stack Wow ApplicationsDram WaferMaterials Science3D Ic ArchitectureElectrical EngineeringComputer Engineering300-Mm WaferSemiconductor Device FabricationMicroelectronicsMicrostructureAdvanced PackagingMicrofabricationUltra-thinning DownApplied PhysicsSemiconductor MemoryThin Films
An ultra-thinning down to 4-μm using 300-mm wafer proven by 40-nm Node 2Gb DRAM has been developed for the first time. Three different types of thinning process including coarse grinding, fine grinding, and stress relief were optimized and an atomic level vacancy less than 10-nm in depth at backside of wafer was formed successively. Thickness uniformity even after thinning down to 4-μm was approximately 1-μm within 300-mm wafer. No degradation in terms of retention characteristics and distribution employing 2Gb DRAM wafer was found after ultra-thinning. This suggests that no damage occurred due to thinning processes including wafer bonding and debonding steps. These results indicate good feasibility for multi-stack Wafer-on-Wafer (WOW) processes with the lowest aspect ratio of TSVs and parasitic capacitance, and enable multi-stacking for Tera-scale high density memory.
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