Tuning of Quasi-Vertical GaN FinFETs Fabricated on SiC Substrates

Abstract

In this work, we present the fabrication and investigation of the properties of quasi-vertical gallium nitride (GaN) fin field effect transistors (FinFETs) on silicon carbide (SiC) substrates and the influence of a postgate metallization annealing (PMA). The devices reveal low subthreshold swings (SSs) down to around 70 mV/dec. For a 1- <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu \text{m}$ </tex-math></inline-formula> -thick drift layer, a low ON-resistance below 0.05 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\text{m}\Omega \cdot $ </tex-math></inline-formula> cm2 (normalized on the fin area) and a breakdown voltage of 60 V were obtained. Devices with included PMA show a decreased threshold voltage and ON-resistance and by several orders of magnitude reduced gate leakage current compared to non-annealed devices. The devices show ohmic contact behavior and slightly negative threshold voltages, which indicates normally- ON behavior. The effective and field-effect mobility of the fin channel was obtained with a modeled carrier concentration and reveal to around 70 and 13 cm2/(Vs) at high gate voltages, which is in a good comparison to so far reported similar devices.