Split and design guidelines for double patterning

Abstract

Double Patterning is investigated at IMEC as a timely solution to meet the 32nm node requirements. It further extends the use of water immersion lithography at its maximum numerical aperture NA=1.35. The aim of DP is to make dense features possible by splitting a design into two more sparse designs and by recombining into the target pattern through a double patterning flow (stitching). Independently of the implementation by the EDA vendors and designers, we discuss some guidelines for split and for DP-compliant design to ensure a robust stitching through process variations. We focus more specifically on the first metal interconnect patterning layer (metal1) for random logic applications. We use both simulations and experiments to study the patterning of 2D split test patterns varied in a systematic way.