Compact Wavelength-Selective Functions in Silicon-on-Insulator Photonic Wires

Wim Bogaerts, Pieter Dumon, Dries Van Thourhout, +6

IEEE Journal of Selected Topics in Quantum Electronics

Photonic DevicePhotonicsCompact Wavelength-selective ElementsOptical InterconnectsEngineering +11

Fabrication of Photonic Wire and Crystal Circuits in Silicon-on-Insulator Using 193-nm Optical Lithography

Shankar Kumar Selvaraja, Patrick Jaenen, Wim Bogaerts, +3

Journal of Lightwave Technology

EngineeringIntegrated PhotonicsExcess Bending LossOptoelectronic DevicesIntegrated Circuits +18

Compact wavelength router based on a Silicon-on-insulator arrayed waveguide grating pigtailed to a fiber array

Pieter Dumon, Wim Bogaerts, Dries Van Thourhout, +5

Optics Express

Silicon-on-insulator Arrayed WaveguideEngineeringFiber OpticsFiber ArrayProgrammable Photonics +14

Pitch doubling through dual-patterning lithography challenges in integration and litho budgets

Mircea Dusa, John Quaedackers, Olaf F. A. Larsen, +12

Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE

Wafer Scale ProcessingEngineeringElectron-beam LithographyBeam LithographyMicrofabrication +11

Linear and Nonlinear Nanophotonic Devices Based on Silicon-on-Insulator Wire Waveguides

Pieter Dumon, Gino Priem, L.R. Nunes, +9

Japanese Journal of Applied Physics

EngineeringNonlinear OpticsNonlinear PropertiesProgrammable PhotonicsOptical Properties +14

Implementation of an industry compliant, 5×50μm, via-middle TSV technology on 300mm wafers

A. Redolfi, Dimitrios Velenis, Sarasvathi Thangaraju, +17

EngineeringSilicon ViasIntegrated CircuitsInterconnect (Integrated Circuits)Cmos Flow +16

3-D Wafer-Level Packaging Die Stacking Using Spin-on-Dielectric Polymer Liner Through-Silicon Vias

Yann Civale, Deniz Sabuncuoglu Tezcan, Harold Philipsen, +6

IEEE Transactions on Components Packaging and Manufacturing Technology

EngineeringIntegrated CircuitsTemporary CarriersWafer Scale ProcessingAdvanced Packaging (Semiconductors) +15

Evaluation of Megasonic Cleaning for Sub-90nm Technologies

Guy Vereecke, Frank Holsteyns, Sophia Arnauts, +8

Diffusion and defect data, solid state data. Part B, Solid state phenomena/Solid state phenomena

Materials ScienceChemical EngineeringEngineeringNanoscale ChemistryFragile Structures +13

Die stacking using 3D-wafer level packaging copper/polymer through-si via technology and Cu/Sn interconnect bumping

Yann Civale, Deniz Sabuncuoglu Tezcan, Harold Philipsen, +6

Engineering3D-wlp Tsv FlowInterconnect (Integrated Circuits)Temporary CarriersWafer Scale Processing +18

Study of novel EUVL mask absorber candidates

Meiyi Wu, Devesh Thakare, Jean‐François de Marneffe, +11

Journal of Micro/Nanopatterning Materials and Metrology

Mask PatterningShort Wavelength OpticOptical MaterialsEngineeringMask 3D +14