High-Peformance BEOL-Compatible Atomic-Layer-Deposited In₂O₃ Fe-FETs Enabled by Channel Length Scaling down to 7 nm: Achieving Performance Enhancement with Large Memory Window of 2.2 V, Long Retention > 10 years and High Endurance > 10⁸ Cycles

Abstract

In this work, we report ultra-scaled Fe-FETs with channel length down to 7 nm enabled by atomically thin In <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</inf> O <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</inf> channels and ferroelectric hafnium zirconium oxide grown by atomic layer deposition (ALD) as back-end-of-line (BEOL) compatible non-volatile memory devices for monolithic 3D integration and in-memory computing applications. High performance ALD In <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</inf> O <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</inf> short-channel Fe-FETs are achieved, exhibiting a large memory window of 2.2 V, long retention> 10 years, and high endurance greater than 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">8</sup> cycles. It is found that the memory characteristics of ALD In <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</inf> O <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</inf> Fe-FETs are enhanced significantly by channel length scaling due to charge balance requirements at the ferroelectric/dielectric (FE/DE) interface and the insufficient positive charge supply at long channel lengths. Therefore, for wide bandgap oxide semiconductors that lack ambipolar carriers, to scale the channel length of the Fe-FET is the key to achieve high performance devices. The aggressive scaling of Fe-Fet enables its integration with logic periphery at the leading edge node (e.g. 7 nm), yielding 3~10x system-level benefits over 22 nm Fe-FET design and 7 nm SRAM design, respectively.