Impact of Scaling on the Performance of HfO₂-Based Ferroelectric Field Effect Transistors

Abstract

The recently discovered ferroelectric behavior of HfO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> -based dielectrics yields the potential to overcome the main challenges of the ferroelectric field-effect transistors (FeFETs) - CMOS compatibility as well as scalability to the state-of-the-art technology nodes of logic transistors. In this paper, we study the impact of scaling on the memory performance of FeFET devices employing Si:HfO2 ferroelectric films. The operation capability was proven down to a gate length of 28 nm. Program/erase characteristics, endurance behavior, and retention properties were analyzed for FeFETs with gate lengths scaled down to 32 nm. The detected difference in the performance between the long and short channel devices could be for the most part attributed to transistor short channel effects. In addition, the effect of temperature on the device properties of Si:HfO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> -based FeFETs was investigated in detail. The program/erase speed was ascertained to be independent of temperature. On the other hand, increase in temperature resulted in reduced initial memory window accompanied by its slightly accelerated decay with time.