IEEE Electron Device Letters · 2021 · 17 citations · 14 references
EngineeringElectrical EngineeringMaterials EngineeringMicroelectronicsSemiconductor DevicesSemiconductor MaterialsComplementary Metal-oxide-semiconductor TechnologyIntegrated Circuit DesignIntegrated Circuit FabricationMetal-oxide-semiconductor Field-effect TransistorsPhysical DesignSemiconductor Device MaterialsChannel EngineeringDrain-induced Barrier LoweringDry EtchingEtchingGate-all-around TransistorsSilicon-on-insulator ProcessingSilicon-on-insulator TechnologySubthreshold Swing
A novel method for manufacturing gate-all-around metal-oxide-semiconductor field effect transistor (GAA MOSFET) based on void embedded silicon on insulator (VESOI) substrate is demonstrated in this work. VESOI with embedded submicron void chambers has been designed to fabricate suspended silicon channels by a one-step lithography and dry etching process. GAA MOSFET built on VESOI substrate exhibits excellent characteristics with subthreshold swing (SS) about 63mV/dec, ON/OFF ratio of 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">10</sup> , drain-induced barrier lowering (DIBL) less than 12mV/V and strong tolerance to back gate bias. This method shows significant advantages to fabricate suspended Si channels, and can be readily extended to other types of material systems for low-power and high-performance applications.
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Silicon carbide on insulator formation using the Smart Cut process [Note 1]
L. Di Cioccio, Y. Le Tiec, F. Letertre et al. · Electronics Letters · 1996 · 120 citations