Jiewen Fan

Insight Into Gate-Induced Drain Leakage in Silicon Nanowire Transistors

Jiewen Fan, Ming Li, Xiaoyan Xu et al. · IEEE Transactions on Electron Devices · 2014 · 148 citations

Semiconductors, Device Modeling, Electrical Engineering +13

Investigations on Line-Edge Roughness (LER) and Line-Width Roughness (LWR) in Nanoscale CMOS Technology: Part II–Experimental Results and Impacts on Device Variability

Runsheng Wang, Xiaobo Jiang, Tao Yu et al. · IEEE Transactions on Electron Devices · 2013 · 81 citations

Electrical Engineering, Engineering, Physics +12

Characterization and analysis of gate-all-around Si nanowire transistors for extreme scaling

Ru Huang, Runsheng Wang, Jing Zhuge et al. · 2011 · 28 citations

Device Modeling, Electrical Engineering, Engineering +15

Two-Dimensional Self-Limiting Wet Oxidation of Silicon Nanowires: Experiments and Modeling

Jiewen Fan, Ru Huang, Runsheng Wang et al. · IEEE Transactions on Electron Devices · 2013 · 16 citations

Silicon Nanowires, Engineering, Cross-sectional Shape +16

Investigation on Electrostatic Discharge Robustness of Gate-All-Around Silicon Nanowire Transistors Combined With Thermal Analysis

Ming Li, Jiewen Fan, Xiaoyan Xu et al. · IEEE Electron Device Letters · 2017 · 14 citations

Device Modeling, Semiconductor Technology, Electrical Engineering +15