Enabling low power BEOL compatible monolithic 3D+ nanoelectronics for IoTs using local and selective far-infrared ray laser anneal technology

Chih-Chao Yang, Jia‐Min Shieh, Tung-Ying Hsieh, Wen-Hsien Huang, Hsing-Hsiang Wang, Chang‐Hong Shen, Tsung‐Ta Wu, Yun-Fang Hou, Yi‐Ju Chen, Yao‐Jen Lee,

2015 · 14 citations · 6 references

Concepts

Abstract

Local and selective far-infrared ray laser annealing (FIR-LA) process with very short heating duration (<;100μs) and low substrate temperature (<;400°C) enables sequentially stacked gate-first nanowire FETs (NWFETs), including 3D <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">+</sup> Si NWFET and poly-Ge junctionless (JL) NWFET, and BEOL compatible monolithic 3D <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">+</sup> nanoelectronics. The 3D <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">+</sup> Si NWFETs, demonstrated by green nano-second laser crystallization (GNS-LC) and FIR-LA processes exhibit steep subthreshold swing (<;90mV/dec.) and high driving current (n-type: 310μA/μm and p-type: 220μA/μm). The 7nm poly-Ge JLNWFET shows high I <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">on</sub> /I <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">off</sub> ratio (>5×10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">4</sup> ) and small DIBL. Furthermore, the thus fabricated low driving voltage 6T SRAM shows a static noise margin (SNM) of 130 mV at Vd=0.4V enabling the low power and low cost 3D <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">+</sup> IC for internet of things (IoTs).

References

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