L. Pasini - Concepedia

Author

L. Pasini

Commissariat à l'Énergie Atomique et aux Énergies Alternatives

Also Known As

L. Pasini, Luca Pasini, Pasini, L.

Publications

557

Citations

H-Index

Concepts

All Affiliations

Commissariat à l'Énergie Atomique et aux Énergies Alternatives Laboratoire d'Électronique des Technologies de l'Information CEA Grenoble STMicroelectronics (France)Institut polytechnique de Grenoble

About

L. Pasini is an author at Commissariat à l'Énergie Atomique et aux Énergies Alternatives specializing in engineering, applied physics, and microelectronics.

Top Concepts

#	Concept	H-Index	Publications	Citations
1	Engineering	12	14	533
2	Applied Physics	12	14	533
3	Computer Engineering	11	12	486
4	Natural Sciences	4	4	275
5	Computer Science	1	1	134

L. Pasini

Publications

533

Citations

H-Index

Page 1

	Year	Citations
3DVLSI with CoolCube process: An alternative path to scaling P. Batude, C. Fenouillet-Béranger, L. Pasini, EngineeringVlsi DesignComputer ArchitectureComputer-aided DesignOptoelectronic Devices	2015	134
First demonstration of a CMOS over CMOS 3D VLSI CoolCube™ integration on 300mm wafers Laurent Brunet, P. Batude, C. Fenouillet-Béranger, EngineeringVlsi DesignIntegrated CircuitsInterconnect (Integrated Circuits)Cmos Coolcube™ Integration	2016	74
3D Sequential Integration: Application-driven technological achievements and guidelines P. Batude, Laurent Brunet, C. Fenouillet-Béranger, Contact PitchEngineering3D ModelingComputer-aided DesignSequential Integration	2017	73
New insights on bottom layer thermal stability and laser annealing promises for high performance 3D VLSI C. Fenouillet-Béranger, B. Mathieu, B. Prévitali, EngineeringVlsi DesignNew InsightsIntegrated CircuitsSemiconductor Device	2014	56
Monolithic 3D integration: A powerful alternative to classical 2D scaling M. Vinet, P. Batude, C. Fenouillet-Béranger, EngineeringDevice Integration3D ModelingMonolithic 3DComputer-aided Design	2014	55
FDSOI bottom MOSFETs stability versus top transistor thermal budget featuring 3D monolithic integration C. Fenouillet-Béranger, B. Prévitali, P. Batude, EngineeringVlsi DesignIntegrated CircuitsSemiconductorsAdvanced Packaging (Semiconductors)	2014	26
FDSOI bottom MOSFETs stability versus top transistor thermal budget featuring 3D monolithic integration C. Fenouillet-Béranger, B. Prévitali, P. Batude, Solid-State Electronics 3D Ic ArchitectureElectrical EngineeringEngineeringVlsi DesignAdvanced Packaging (Semiconductors)	2015	21
(Invited) Direct Bonding: A Key Enabler for 3D Monolithic Integration Laurent Brunet, P. Batude, Frank Fournel, ECS Transactions Bottom Transistor LevelEngineeringDevice IntegrationComputer ArchitectureMonolithic 3D	2014	20
High performance CMOS FDSOI devices activated at low temperature L. Pasini, P. Batude, J. Lacord, 3D Ic ArchitectureElectrical EngineeringSige 27EngineeringVlsi Design	2016	14
High performance low temperature activated devices and optimization guidelines for 3D VLSI integration of FD, TriGate, FinFET on insulator L. Pasini, P. Batude, M. Cassé, 3D Ic ArchitectureElectrical EngineeringOptimization GuidelinesEngineeringVlsi Design	2015	13

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