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Self-aligned nickel-mono-silicide technology for high-speed deep submicrometer logic CMOS ULSI
275
Citations
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References
1995
Year
EngineeringVlsi DesignOptoelectronic DevicesIntegrated CircuitsSilicon On InsulatorNew MosfetInterconnect (Integrated Circuits)Wafer Scale ProcessingDopant AtomsInstrumentationMaterials ScienceElectrical EngineeringComputer EngineeringSemiconductor Device FabricationNisi TechnologyMicroelectronicsMicrofabricationSurface ScienceApplied PhysicsSelf-aligned Nickel-mono-silicide TechnologyBeyond Cmos
A nickel-monosilicide (NiSi) technology suitable for a deep sub-micron CMOS process has been developed. It has been confirmed that a nickel film sputtered onto n/sup +/- and p/sup +/-single-silicon and polysilicon substrates is uniformly converted into the mono-silicide (NiSi), without agglomeration, by low-temperature (400-600/spl deg/C) rapid thermal annealing. This method ensures that the silicided layers have low resistivity. Redistribution of dopant atoms at the NiSi-Si interface is minimal, and a high dopant concentration is achieved at the silicide-silicon interface, thus contributing to low contact resistance. This NiSi technology was used in the experimental fabrication of deep-sub-micrometer CMOS structures; the current drivability of both n- and p-MOSFET's was higher than with the conventional titanium salicide process, and ring oscillator constructed with the new MOSFET's also operated at higher speed.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">></ETX>
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