K. Suguro

Self-aligned nickel-mono-silicide technology for high-speed deep submicrometer logic CMOS ULSI

T. Morimoto, T. Ohguro, H.S. Momose et al. · IEEE Transactions on Electron Devices · 1995 · 275 citations

Engineering, Vlsi Design, Optoelectronic Devices +18

10–15 nm Ultrashallow Junction Formation by Flash-Lamp Annealing

Takayuki Ito, Toshihiko Iinuma, Atsushi Murakoshi et al. · Japanese Journal of Applied Physics · 2002 · 82 citations

Materials Science, Semiconductor Technology, Electrical Engineering +11

Improvement of threshold voltage deviation in damascene metal gate transistors

A. Yagishita, Tomohiro Saito, K. Nakajima et al. · IEEE Transactions on Electron Devices · 2001 · 76 citations

Device Modeling, Materials Science, Electrical Engineering +10

Process integration technology and device characteristics of CMOS FinFET on bulk silicon substrate with sub-10 nm fin width and 20 nm gate length

K. Okano, T. Izumida, H. Kawasaki et al. · 2006 · 76 citations

Electrical Engineering, Bulk Silicon Substrate, Engineering +9

High performance 35 nm gate length CMOS with NO oxynitride gate dielectric and Ni salicide

S. Inaba, K. Okano, Shôichi Matsuda et al. · IEEE Transactions on Electron Devices · 2002 · 75 citations

Low-power Electronics, Nitrogen Concentration, Electrical Engineering +12