H. Kawasaki

Process integration technology and device characteristics of CMOS FinFET on bulk silicon substrate with sub-10 nm fin width and 20 nm gate length

K. Okano, T. Izumida, H. Kawasaki et al. · 2006 · 76 citations

Engineering, Electrical Engineering, Microfabrication +16

Microstructural characterization of inlaid copper interconnect lines

Paul R. Besser, Ehrenfried Zschech, Werner Blum et al. · Journal of Electronic Materials · 2001 · 70 citations

Engineering, Electrical Engineering, Materials Engineering +14

Statistical analysis of early failures in electromigration

M. Gall, C. Capasso, D. Jawarani et al. · Journal of Applied Physics · 2001 · 63 citations

Engineering, Electrical Engineering, Materials Science +17

High-Performance FinFET with Dopant-Segregated Schottky Source/Drain

A. Kaneko, A. Yagishita, K. Yahashi et al. · 2006 · 53 citations

Engineering, Electrical Engineering, Electronic Materials +11

Sidewall transfer process and selective gate sidewall spacer formation technology for sub-15nm finfet with elevated source/drain extension

A. Kaneko, A. Yagishita, K. Yahashi et al. · 2006 · 44 citations

Engineering, Electrical Engineering, Low-power Design +11