3D stackable 32nm High-K/Metal Gate SOI embedded DRAM prototype

John Golz, John Safran, Bishan He, Derek Leu, Ming Yin, Todd Weaver, Adis Vehabovic, Yan Sun, Alberto Cestero, Ben Himmel,

2011 · 19 citations · 2 references

Concepts

Abstract

For the first time we report a high performance embedded DRAM prototype fabricated in a 3D stackable 32nm High-K/Metal Gate technology with copper through-silicon vias. Post through-via processing functional test demonstrates that <1.5ns latency and 500MHz operation are preserved.

References

2