John Safran

3D copper TSV integration, testing and reliability

Mukta Farooq, Troy Graves-Abe, W. Landers et al. · 2011 · 106 citations

3D Ic Architecture, Electrical Engineering, Engineering +15

Electrically Programmable Fuse (eFUSE): From Memory Redundancy to Autonomic Chips

Norm Robson, John Safran, C. Kothandaraman et al. · 2007 · 80 citations

Hardware Security, Electrical Engineering, Manycore Processor +14

Field Tolerant Dynamic Intrinsic Chip ID Using 32 nm High-K/Metal Gate SOI Embedded DRAM

Sami Rosenblatt, Daniel Fainstein, Alberto Cestero et al. · IEEE Journal of Solid-State Circuits · 2013 · 50 citations

Hardware Security, Electrical Engineering, Engineering +12

A power-optimized widely-tunable 5-GHz monolithic VCO in a digital SOI CMOS technology on high resistivity substrate

Jonghae Kim, Asit K. Ray, L. Wagner et al. · 2003 · 46 citations

Low-power Electronics, Electrical Engineering, Engineering +12

A Commercial Field-Programmable Dense eFUSE Array Memory with 99.999% Sense Yield for 45nm SOI CMOS

Greg Uhlmann, Tony Aipperspach, T. Kirihata et al. · 2008 · 27 citations

Hardware Security, Non-volatile Memory, Electrical Engineering +11