Ben Himmel

3D copper TSV integration, testing and reliability

Mukta Farooq, Troy Graves-Abe, W. Landers et al. · 2011 · 107 citations

Engineering, Electrical Engineering, Materials Science +17

3D stackable 32nm High-K/Metal Gate SOI embedded DRAM prototype

John Golz, John Safran, Bishan He et al. · 2011 · 19 citations

Engineering, Computer Engineering, Electrical Engineering +16

Three-Dimensional Wafer Stacking Using Cu TSV Integrated with 45 nm High Performance SOI-CMOS Embedded DRAM Technology

Pooja Batra, Spyridon Skordas, D. LaTulipe et al. · Journal of Low Power Electronics and Applications · 2014 · 19 citations · Full text

Engineering, Computer Engineering, Electrical Engineering +17

Three-dimensional wafer stacking using Cu TSV integrated with 45nm high performance SOI-CMOS embedded DRAM technology

Pooja Batra, D. LaTulipe, Spyridon Skordas et al. · 2013 · 13 citations

Engineering, Computer Engineering, Electrical Engineering +17