Pooja Batra - Concepedia

Author

Pooja Batra

Also Known As

Pooja Batra

Publications

Citations

H-Index

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Pooja Batra is an author at IBM (United States) specializing in computer engineering, electrical engineering, and microelectronics.

#	Concept	H-Index	Publications	Citations
1	Engineering	4	4	61
2	Computer Engineering	4	4	61
3	Electrical Engineering	4	4	61
4	Applied Physics	3	3	43
5	Advanced Packaging	3	3	50

Pooja Batra

Publications

Citations

H-Index

Page 1

	Year	Citations
Three-Dimensional Wafer Stacking Using Cu TSV Integrated with 45 nm High Performance SOI-CMOS Embedded DRAM Technology Pooja Batra, Spyridon Skordas, D. LaTulipe, Journal of Low Power Electronics and Applications EngineeringIntegrated CircuitsInterconnect (Integrated Circuits)Wafer Scale ProcessingAdvanced Packaging (Semiconductors)	2014	19
Three-Dimensional Dynamic Random Access Memories Using Through-Silicon-Vias T. Kirihata, John Golz, M.R. Wordeman, IEEE Journal on Emerging and Selected Topics in Circuits and Systems EngineeringEmerging Memory TechnologyComputer ArchitectureOrthogonal ScalingIntegrated Circuits	2016	18
Three-dimensional wafer stacking using Cu TSV integrated with 45nm high performance SOI-CMOS embedded DRAM technology Pooja Batra, D. LaTulipe, Spyridon Skordas, EngineeringComputer ArchitectureThree-dimensional WaferIntegrated CircuitsInterconnect (Integrated Circuits)	2013	13
Prototype of multi-stacked memory wafers using low-temperature oxide bonding and ultra-fine-dimension copper through-silicon via interconnects Wei‐Hung Lin, Johnathan Faltermeier, Kevin Winstel, EngineeringComputer ArchitectureItrs RoadmapInterconnect (Integrated Circuits)Wafer Scale Processing	2014	11

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