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An analytical model for the determination of the transient response of CML and ECL gates
47
Citations
10
References
1990
Year
Device ModelingElectrical EngineeringEngineeringEcl GatesEmitter Follower DelayAnalytical ModelFull-range Transient ResponseBias Temperature InstabilityTransient ResponsePropagation DelayCircuit ReliabilityModeling And SimulationDigital Circuit DesignMicroelectronicsCircuit AnalysisCircuit SimulationAsynchronous Circuits
In the analysis, the full-range transient response of the gate is calculated using closed-form analytical expressions. This is achieved by generalizing and improving the method used by J.M.C. Stork (IEDM Tech. Dig., p.550, 1988) for the determination of the propagation delay. The proposed model is applicable at low-level injection, unity fan-in, and unity fan-out. The delays related to the transit time, the load, and the junction capacitances are considered. For ECL gates, the emitter follower delay is also included. Various delays (risetime, propagation delay, etc.) calculated using the proposed model agree perfectly with the results of SPICE computer simulations and with the reported experimental values.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">></ETX>
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