Concepedia

Gate Delay Modeling

Gate Delay Modeling is a computational modeling approach that specifically characterizes the propagation delay of digital logic gates within a circuit as a function of input transition time, output load, and process variations, thereby enabling accurate timing analysis in integrated circuit design.

557

Publications

19.8K

Citations

1.4K

Authors

340

Institutions

Publications per year

2017–2026

20

Parents

Publications

557

Approximation of wiring delay in MOSFET LSI

T. Sakurai · IEEE Journal of Solid-State Circuits · 1983 · 409 citations

, , +16

Statistical Timing Analysis for Intra-Die Process Variations with Spatial Correlations

Aseem Agarwal, David Blaauw, Vladimir Zolotov · 2003 · 398 citations

, , +16

Modeling the "Effective capacitance" for the RC interconnect of CMOS gates

Jessica Qian, S. Pullela, L.T. Pillage · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 1994 · 338 citations

, , +17

MOTIS-An MOS timing simulator

B.R. Chawla, H.K. Gummel, P. Kozak · IEEE Transactions on Circuits and Systems · 1975 · 312 citations

, , +17

Statistical timing analysis for intra-die process variations with spatial correlations

A. Agarwal, David Blaauw, V. Zolotov · ICCAD-2003. International Conference on Computer Aided Design (IEEE Cat. No.03CH37486) · 2003 · 310 citations

, , +16

1–5 of 557

Authors

1.4K

  1. DB
    David Blaauw

    University of Michigan, United States

    13 publications · 1.2K citations

    11

    h-index

  2. SV
    Sarma Vrudhula

    Arizona State University, United States

    12 publications · 490 citations

    11

    h-index

  3. LT
    Lawrence T. Pileggi

    Carnegie Mellon University, United States

    10 publications · 742 citations

    10

    h-index

  4. MH
    Masanori Hashimoto

    The University of Osaka, Japan

    10 publications · 254 citations

    10

    h-index

  5. HO
    Hidetoshi Onodera

    Kyoto University, Japan

    9 publications · 211 citations

    9

    h-index

1–5 of 1.4K

Institutions

340

  1. University of Michigan

    Ann Arbor, United States

    18 h-index

    49 publications

    2.9K citations

  2. IBM Research - Thomas J. Watson Research Center

    Yorktown Heights, United States

    16 h-index

    42 publications

    1.7K citations

  3. IBM (United States)

    Armonk, United States

    16 h-index

    86 publications

    3.8K citations

  4. The University of Texas at Austin

    Austin, United States

    14 h-index

    47 publications

    3.6K citations

  5. Intel (United States)

    Santa Clara, United States

    14 h-index

    21 publications

    915 citations

  6. University of California, Berkeley

    Berkeley, United States

    14 h-index

    39 publications

    1.6K citations

  7. Kyoto University

    Kyoto, Japan

    12 h-index

    42 publications

    992 citations

  8. Hitachi (Japan)

    Tokyo, Japan

    12 h-index

    50 publications

    988 citations

1–8 of 340

Venues

  1. 24

    h-index

  2. IEEE Journal of Solid-State Circuits

    32 publications · 1.7K citations

    19

    h-index

  3. 14

    h-index

  4. IEEE Transactions on Electron Devices

    18 publications · 485 citations

    14

    h-index

  5. Electronics Letters

    12 publications · 219 citations

    11

    h-index

1–5