IEEE Electron Device Letters · 1991 · 96 citations · 7 references
Device ModelingElectrical EngineeringEngineeringNanoelectronicsElectronic EngineeringBias Temperature InstabilityApplied PhysicsBase-collector JunctionMicroelectronicsParasitic Energy BarriersSemiconductor DeviceParasitic Conduction-band Barrier
Parasitic energy barriers can easily be introduced during processing. Measurements and calculations of experimental n-p-n HBTs (heterojunction bipolar transistors) are presented, showing that a parasitic conduction-band barrier at the base-collector junction reduces the collector current and the cutoff frequency. A simple analytical model explains the f/sub T/ degradation, caused by the reduction of the collector current and a pileup of minority carriers in the base. With the model the effective height and width of the barrier can also be derived from the measured collector current enhancement factor I/sub C/(SiGe)/I/sub C/(Si).< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">></ETX>
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E.J. Prinz, P.M. Garone, Peter Schwartz et al. · IEEE Electron Device Letters · 1991 · 115 citations
Semiconductors, Semiconductor Technology, Electrical Engineering +10
63-75 GHz f<sub>T</sub> SiGe-base heterojunction bipolar technology
G.L. Patton, J.H. Comfort, B.S. Meyerson et al. · 1990 · 41 citations