IEEE Electron Device Letters · 1992 · 104 citations · 9 references
Semiconductor TechnologyElectrical EngineeringEngineeringPhysicsApplied PhysicsMobility DegradationMultilayer HeterostructuresSemiconductor Device FabricationIntegrated CircuitsSilicon On InsulatorMicroelectronicsPmos TransistorInversion RegionHole Mobility EnhancementSemiconductor Device
Effective hole mobility enhancements of 50% at room temperature and over 100% at 90 K, compared to all-Si controlled devices, are demonstrated by placing a buried epitaxial Ge/sub x/Si/sub 1-x/ layer 7.5 to 10.0 nm beneath the gate oxide of a PMOS transistor. Mobility degradation caused by misfit dislocations in the inversion region is seen in structures with GeSi/sub 1-x/ layers that exceed the equilibrium critical thickness.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">></ETX>
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