Japanese Journal of Applied Physics · 2005 · 19 citations · 5 references
EngineeringElectrical EngineeringMaterials ScienceElectronic MaterialsSemiconductor DevicesSemiconductor MaterialsDevice CharacterizationDopingIon ImplantationSemiconductor Device MaterialsSemiconductor InterfacesCapacitanceCapacitance-voltage CharacteristicsCapacitance-voltage CharacterizationCapacitance-voltage MeasurementsGate Oxide InterfacesGate OxidesImpuritiesVoid Formation
Workfunction tuning by the implantation of various impurities and by changing silicidation conditions was investigated for a fully silicided NiSi gate. In the case of Sb implantation, it was found that the NiSi gate workfunction was decreased by 0.34 eV from 4.60 eV, for an undoped NiSi gate, to 4.26 eV due to the lowering of the silicidation temperature. Ge, which has not been used for workfunction tuning before, induced a decrease in NiSi gate workfunction in the same way. In the case of In implantation, a decrease in accumulation capacitance in capacitance–voltage ( C – V ) characteristics was observed. The origin of this problem was found to be void formation at the oxide interface. The voids were also found in NiSi predoped with Sb and silicided at 450°C or lower.
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Dipole layers at the metal-SiO2 interface
T. W. Hickmott · Journal of Applied Physics · 1980 · 67 citations
Low-temperature redistribution of As in Si during Pd2Si formation
Iwao Ohdomari, K. N. Tu, K. Suguro et al. · Applied Physics Letters · 1981 · 54 citations