14 nm chip package interaction development with Cu pillar bump flip chip package

Abstract

This paper presents the 14 nm chip and package interaction (CPI) challenges and development by using 130 um pitch Cu pillar bump in flip chip BGA package. We evaluated 14 nm back-end-of-line (BEOL) film strength / structure / adhesion by passing all the torture tests and CPI reliability tests (Precon, uHAST, TCT, TST and HTST) and following the JEDEC standard. SAM (Scanning Acoustic Microscope) and typical electrical test were used to confirm any failures. Furthermore, SEM (Scanning Electron Microscope) and FIB (Focused Ion Beam) were used to confirm the defect mode. A 3D thermal-mechanical finite element model was built to analyze the stress field for early material assessment, selection and structure optimization, and the results were confirmed by experiments. Two types of BEOL film structure results showed that the film stack change does not affect CPI reliability because the change in package structure is minor. In addition, we can clearly and easily see from the results that PI (Polyimide) acted as package stress buffer and protected the passivation layer (PASV) from cracking in multiple reflow and QTC (Quick Temperature Cycling Test). The simulation results for different bump size and underfill material revealed that small bump, large PI opening, and low Tg (Glass Transition Temperature) underfill induced more stress on BEOL film stack. This conclusion is comparable with simulation data.