Root Cause Mechanism for Delamination/Cracking in Stacked Die Chip Scale Packages

Abstract

A key challenge in the development of ultra-thin stacked die chip scale packages is to meet package performance requirements without delamination. Interfacial delamination and cohesive failure are particular concerns. The root cause of this type of failure is difficult to discern, even with extensive root cause analysis and focused DOEs. Through comprehensive simulation and material characterization, three key parameters were identified which affected the package performance, i.e., substrate thickness, reflow time and substrate diffusivity. The root cause model established the relationship between moisture uptake, material properties such as diffusivity and porosity, and vapor pressure buildup. Two scenarios with regard to package behavior during soldering reflow are predicted.