An Analytical Model for the Threshold Voltage of Short-Channel Double-Material-Gate (DMG) MOSFETs with a Strained-Silicon (s-Si) Channel on Silicon-Germanium (SiGe) Substrates

Abstract

In this paper, an analytical threshold voltage model is developed for a short-channel double-material-gate (DMG) strained-silicon (s-Si) on silicon-germanium (Si<SUB>1-x</SUB> Ge<SUB>x</SUB>) MOSFET structure. The proposed threshold voltage model is based on the so called virtual-cathode potential formulation. The virtual-cathode potential is taken as minimum channel potential along the transverse direction of the channel and is derived from tow-dimensional (2D) potential distribution of channel region. The (2D) potential distribution of channel region. The 2D channel potential is formulated by solving the 2D Poisson"s equation with suitable boundary conditions in both the strained-Si layer and relaxed Si<SUB>1-x</SUB> Ge<SUB>x</SUB> layer. The effects of a number of device parameters like the Ge mole fraction, Si film thickness and gate-length ratio have been considered on threshold voltage. Further, the drain induced barrier lowering (DIBL) has also been analyzed for gate-length ratio and amount of strain variations. The validity of the present 2D analytical model is verified with ATLAS<SUP>TM</SUP>, a 2D device simulator from Silvaco Inc.