2001 · 32 citations · 11 references
EngineeringComputer EngineeringComputer ScienceComputer ArchitectureEmbedded SystemsSystem-on-chip DesignBuilt-in Self-testDesign For TestabilityInstruction Set ArchitectureMemory Subsystem DesignEmbedded MemoryEmbedded TestMemory Built-in Self-testMemory TestMicroprocessor Built-in Self-testOn-chip Test Pattern GenerationSelf-test ArchitectureSelf-test Mechanisms
We present a processor-programmable built-in self-test (BIST) scheme suitable for embedded memory testing in the system-on-a-chip (SOC) environment. The proposed BIST circuit can be programmed via an on-chip microprocessor. Upon receiving the commands from the microprocessor, the BIST circuit generates pre-defined test patterns and compares the memory outputs with the expected outputs. Most popular memory test algorithms can be realized by properly programming the BIST circuit using the processor instructions. Compared with processor-based memory BIST schemes that use an assembly-language program to generate test patterns and compare the memory outputs, the test time of the proposed memory BIST scheme is greatly reduced.
11
Using march tests to test SRAMs
A.J. van de Goor · IEEE Design & Test of Computers · 1993 · 271 citations
Engineering, Computer Engineering, Electrical Engineering +16
A programmable BIST core for embedded DRAM
Chih-Tsun Huang, Jing-Reng Huang, Chi-Feng Wu et al. · IEEE Design & Test of Computers · 1999 · 125 citations