Jing-Reng Huang

A programmable BIST core for embedded DRAM

Chih-Tsun Huang, Jing-Reng Huang, Chi-Feng Wu et al. · IEEE Design & Test of Computers · 1999 · 124 citations

Programmable Bist Design, Engineering, Mem Testing +17

A self-test methodology for IP cores in bus-based programmable SoCs

Jing-Reng Huang, M.K. Iyer, Kwang‐Ting Cheng · 2002 · 61 citations

Engineering, Computer Architecture, Embedded Systems +16

BRAINS: a BIST compiler for embedded memories

Chuang Cheng, Chih-Tsun Huang, Jing-Reng Huang et al. · 2002 · 36 citations

Engineering, Mem Testing, Various Sram +19

Test scheduling of BISTed memory cores for SoC

Chih-Wea Wang, Jing-Reng Huang, Yen-Fu Lin et al. · 2003 · 24 citations

Test Scheduling Algorithm, Test Scheduling, Engineering +13

Automatic generation of memory built-in self-test cores for system-on-chip

Kuo-Liang Cheng, Chia-Ming Hsueh, Jing-Reng Huang et al. · 2002 · 24 citations

Hardware Security, Automatic Generation Framework, Memory Architecture +14