Self-test Architecture
Self-Test Architecture is a structural framework within built-in self-test systems that integrates self-diagnostic mechanisms, test pattern generation, and response analysis components to enable autonomous fault detection and verification of circuit functionality without external test equipment.
604
Publications
19.4K
Citations
1.4K
Authors
404
Institutions
Publications per year
2017–2026
43
Variants
Bist ArchitectureBuilt-in Self-test Architecture
Parents
604
Self-Testing of Multichip Logic Modules.
Paul H. Bardell, W.H. McAnney · International Test Conference · 1982 · 270 citations
A structured test re-use methodology for core-based system chips
Microprocessor Software-Based Self-Testing
Mihalis Psarakis, Dimitris Gizopoulos, Ernesto Sánchez et al. · IEEE Design & Test of Computers · 2010 · 256 citations
1–5 of 604
1.4K
15
h-index
14
h-index
14
h-index
National and Kapodistrian University of Athens, Greece
15 publications · 694 citations
14
h-index
12
h-index
1–5 of 1.4K
404

National and Kapodistrian University of Athens
Athens, Greece
14 h-index
32 publications
1.2K citations
Politecnico di Torino
Turin, Italy
13 h-index
71 publications
2.2K citations

University of Piraeus
Piraeus, Greece
13 h-index
21 publications
994 citations
AT&T (United States)
Bedminster, United States
12 h-index
22 publications
1.2K citations
IBM (United States)
Armonk, United States
12 h-index
63 publications
2.3K citations
Mentor Technologies
Tulsa, United States
11 h-index
17 publications
394 citations
University of Wisconsin–Madison
Madison, United States
11 h-index
19 publications
1.4K citations
Intel (United States)
Santa Clara, United States
11 h-index
39 publications
711 citations
1–8 of 404
30 publications · 1.9K citations
20
h-index
26 publications · 1.5K citations
19
h-index
19 publications · 735 citations
16
h-index
21 publications · 1K citations
16
h-index
18 publications · 571 citations
14
h-index
1–5