Concepedia

The Effect of Elevated Temperature on Latchup and Bit Errors in CMOS Devices

W. A. Kolasinski, R. Koga, E. R. Schnauss, James R. Duffey

IEEE Transactions on Nuclear Science · 1986 · 52 citations · 6 references

Abstract

Equipment for testing microcircuits at elevated temperatures for Single Event Phenomena (SEP) such as upset (SEU) and latchup (SEL) has been developed and measurements on several device types have been performed. Very large changes in cross-section and threshold LET have been observed over the temperature range of 25°C to 120°C for SEU and SEL.

References

6

Simulation of Cosmic-Ray Induced Soft Errors and Latchup in Integrated-Circuit Computer Memories

W. A. Kolasinski, J. B. Blake, J. K. Anthony et al. · IEEE Transactions on Nuclear Science · 1979 · 113 citations

Engineering, Computer Science, Physics +14

Error Analysis and Prevention of Cosmic Ion-Induced Soft Errors in Static CMOS RAMs

S. E. Diehl, A. Ochoa, P. V. Dressendorfer et al. · IEEE Transactions on Nuclear Science · 1982 · 83 citations

Engineering, Computer Engineering, Electrical Engineering +14

Heavy Ion-Induced Single Event Upsets of Microcircuits; A Summary of the Aerospace Corporation Test Data

R. Koga, W. A. Kolasinski · IEEE Transactions on Nuclear Science · 1984 · 56 citations

Engineering, Computer Engineering, Electrical Engineering +10

Single Event Upset (SEU) of Semiconductor Devices - A Summary of JPL Test Data

Donald K. Nichols, William E. Price, C. J. Malone · IEEE Transactions on Nuclear Science · 1983 · 24 citations

Engineering, Computer Engineering, Electrical Engineering +13

Single Event Upset Dependence on Temperature or an NMOS/Resistive-Load Static RAM

W.J. Stapor, Richard L. Johnson, M. A. Xapsos et al. · IEEE Transactions on Nuclear Science · 1986 · 15 citations

Engineering, Electrical Engineering, Nuclear Engineering +14