Test cost reduction through a reconfigurable scan architecture

Abstract

Scan-based designs are widely used to keep test generation complexity within practical limits; nevertheless, scan-based design substantially increases test application time and test data volume. A novel scan-based design is proposed to reduce the test cost. The new scan-design exploits the low specified bit density of the test sets. The circular structure of the proposed architecture enables the use of the captured response of the previously applied pattern as a template for the subsequent pattern while allowing the full observation of the captured response. The functionality provided by the new architecture is utilized to update the template quickly to obtain the next pattern. The experimental results show a substantial reduction in test cost, reaching 90% levels.