Electronic trap characterization of the Sc2O3∕La2O3 high-κ gate stack by scanning tunneling microscopy

Abstract

The tunneling current versus voltage characteristic of the Sc2O3∕La2O3∕SiOx high-κ gate stack is examined using scanning tunneling microscopy in ultrahigh vacuum. Different measurement bias polarities allow information on the location (i.e., in the high-κ or interfacial SiOx layer) of the electronic traps to be extracted. Two types of localized leakage sites may be distinguished. Lowering of the electron barrier height and trap-assisted tunneling are proposed as the two leakage mechanisms.