Process Variation Tolerance
Process Variation Tolerance is a design-level attribute in near-threshold computing that characterizes a system’s resilience to parametric deviations in manufacturing processes by maintaining correct functionality and performance despite variations in transistor-level electrical properties.
490
Publications
22.3K
Citations
1.6K
Authors
345
Institutions
Publications per year
2017–2026
91
Parents
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Parameter variations and impact on circuits and microarchitecture
Shekhar Borkar, Tanay Karnik, S. Narendra et al. · 2003 · 1.4K citations
FreePDK: An Open-Source Variation-Aware Design Kit
James E. Stine, Ivan D. Castellanos, Michael Wood et al. · 2007 · 429 citations
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Intel (United States)
Santa Clara, United States
29 h-index
158 publications
17.8K citations
Purdue University West Lafayette
West Lafayette, United States
22 h-index
91 publications
6.9K citations
IBM (United States)
Armonk, United States
15 h-index
56 publications
8.7K citations
University of Michigan
Ann Arbor, United States
14 h-index
67 publications
6.8K citations
Georgia Institute of Technology
Atlanta, United States
12 h-index
53 publications
2.4K citations
Karlsruhe Institute of Technology
Karlsruhe, Germany
10 h-index
31 publications
736 citations
IBM Research - Austin
Austin, United States
10 h-index
28 publications
4.9K citations
Samsung (South Korea)
Seoul, South Korea
9 h-index
31 publications
1.4K citations
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22 publications · 2.6K citations
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29 publications · 1.6K citations
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16 publications · 580 citations
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11 publications · 363 citations
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11 publications · 626 citations
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