Embedded Die Packaging

Embedded Die Packaging is a chip packaging technology in which a semiconductor die is embedded within a substrate or encapsulation material to enable high-density interconnectivity, improved thermal dissipation, and reduced package footprint compared to conventional surface-mounted die configurations.

93

Publications

4.3K

Citations

431

Authors

87

Institutions

Publications per year

2017–2026

19

Authors

431

  1. GS
    Gaurav Sharma

    Shoolini University, India

    5 publications · 161 citations

    5

    h-index

  2. EB
    Eric Beyne

    IMEC, Belgium

    5 publications · 345 citations

    5

    h-index

  3. SW
    Seung Wook Yoon

    Institute of Microelectronics, Singapore

    5 publications · 169 citations

    5

    h-index

  4. RA
    R. Aschenbrenner

    Fraunhofer Institute for Reliability and Microintegration, Germany

    5 publications · 100 citations

    5

    h-index

  5. AO
    Andreas Ostmann

    Fraunhofer Institute for Reliability and Microintegration, Germany

    5 publications · 138 citations

    5

    h-index

1–5 of 431

Venues

  1. 9

    h-index

  2. Microelectronics Reliability

    7 publications · 652 citations

    7

    h-index

  3. IEEE Transactions on Advanced Packaging

    3 publications · 96 citations

    3

    h-index

  4. 2

    h-index

  5. Materialia

    1 publications · 19 citations

    1

    h-index

1–5