Seung Wook Yoon - Concepedia

Author

Seung Wook Yoon

Institute of Microelectronics

Also Known As

, S W Yoon, S. W. Yoon, S. Yoon, S.W. Yoon, SeongTae Yoon, Seung Wook Yoon, Seung Yoon, Yoon, S.W.

127

Publications

Citations

H-Index

Concepts

All Affiliations

Institute of Microelectronics STATS ChipPAC (Singapore)Korea Advanced Institute of Science and Technology Agency for Science, Technology and Research Singapore Science Park

About

Seung Wook Yoon is an author at Institute of Microelectronics specializing in engineering, electronic packaging, and microelectronics.

Top Concepts

#	Concept	H-Index	Publications	Citations
1	Engineering	23	46	1.6K
2	Electrical Engineering	19	35	1.1K
3	Computer Engineering	16	24	759
4	Applied Physics	11	14	405
5	Materials Engineering	9	9	236

Seung Wook Yoon

Publications

1.7K

Citations

H-Index

Page 1

	Year	Citations
High RF performance TSV silicon carrier for high frequency application Soon Wee Ho, Seung Wook Yoon, Qiaoer Zhou, EngineeringRadio FrequencyHigh Frequency SignalHigh FrequencyInterconnect (Integrated Circuits)	2008	131
Thermodynamics-aided alloy design and evaluation of Pb-free solder, SnBiInZn system Seung Wook Yoon, Jeong Ryong Soh, Hyuck Mo Lee, Acta Materialia Materials ScienceEngineeringMechanical EngineeringAlloy DesignThermodynamics-aided Alloy Design	1997	128
Electromigration in flip chip solder joints having a thick Cu column bump and a shallow solder interconnect Jae-Woong Nah, Jong-ook Suh, K. N. Tu, Journal of Applied Physics Advanced PackagingMaterials ScienceElectrical EngineeringElectromigration TechniqueEngineering	2006	99
Thermodynamic prediction of interface phases at Cu/solder joints Hyuck Mo Lee, Seung Wook Yoon, Byeong‐Joo Lee Journal of Electronic Materials Materials ScienceEngineeringMetallurgical InteractionInterface PhasesWeld Pool Solidification	1998	96
Fanout flipchip eWLB (embedded Wafer Level Ball Grid Array) technology as 2.5D packaging solutions Seung Wook Yoon, Patrick Tang, Roger Emigh, Advanced Packaging3D Ic ArchitectureElectrical EngineeringChip-scale PackageEngineering	2013	79
Three-dimensional system-in-package using stacked silicon platform technology V. Kripesh, Seung Wook Yoon, V.P. Ganesh, IEEE Transactions on Advanced Packaging EngineeringComputer ArchitectureGood DiceDaisy ChainAdvanced Packaging (Semiconductors)	2005	76
Next generation eWLB (embedded wafer level BGA) packaging Yonggang Jin, Xavier Baraton, Seung Wook Yoon,	2010	72
3D TSV processes and its assembly/packaging technology Seung Wook Yoon, Dae Wook Yang, Jae Hoon Koo, EngineeringComputer-aided DesignMaterial HandlingTsv ProcessesWafer Scale Processing	2009	66
Advanced low profile PoP solution with embedded wafer level PoP (eWLB-PoP) technology Seung Wook Yoon, Jose Alvin Caparas, Yaojian Lin,	2012	59
Study of Low-Temperature Thermocompression Bonding in Ag-In Solder for Packaging Applications Riko I Made, Chee Lip Gan, Li Ling Yan, Journal of Electronic Materials Materials EngineeringMaterials ScienceThermal InsulationEngineeringPackaging Applications	2008	54

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