At-speed Testing
At-Speed Testing is a built-in self-test methodology that distinguishes itself by applying test patterns and capturing responses at the operational clock frequency of the circuit under test to detect speed-dependent faults.
248
Publications
8.7K
Citations
658
Authors
165
Institutions
Publications per year
2017–2026
4
248
A case study of ir-drop in structured at-speed testing
J. Saxena, Kenneth M. Butler, Vinay Jayaram et al. · 2004 · 403 citations
Engineering, Computer Engineering, Electrical Engineering +14
Logic BIST for large industrial designs: real issues and case studies
G. Hetherington, T. Fryars, N. Tamarapalli et al. · 2003 · 284 citations
Engineering, Computer Engineering, Electrical Engineering +16
1–5 of 248
658
14
h-index
13
h-index
11
h-index
11
h-index
10
h-index
1–5 of 658
165
Mentor Technologies
Tulsa, United States
15 h-index
69 publications
3.7K citations
Kyushu Institute of Technology
Kitakyushu, Japan
15 h-index
69 publications
2K citations
Siemens (Hungary)
Budapest, Hungary
14 h-index
51 publications
3.4K citations
Texas Instruments (United States)
Dallas, United States
12 h-index
34 publications
5.5K citations
University of Iowa
Iowa City, United States
11 h-index
22 publications
772 citations
IBM Research - Thomas J. Watson Research Center
Yorktown Heights, United States
11 h-index
32 publications
971 citations
University of California San Diego
San Diego, United States
10 h-index
22 publications
1.6K citations
National Tsing Hua University
Hsinchu, Taiwan
10 h-index
33 publications
809 citations
1–8 of 165
18 publications · 741 citations
15
h-index
12 publications · 335 citations
11
h-index
8 publications · 246 citations
8
h-index
6 publications · 478 citations
6
h-index
4 publications · 207 citations
4
h-index
1–5