D. Jaeger

A cost effective 32nm high-K/ metal gate CMOS technology for low power applications with single-metal/gate-first process

X. Chen, S. Samavedam, Vijay Narayanan et al. · 2008 · 113 citations

Engineering, Computer Engineering, Electrical Engineering +16

22nm High-performance SOI technology featuring dual-embedded stressors, Epi-Plate High-K deep-trench embedded DRAM and self-aligned Via 15LM BEOL

P. Chang, C. Ortolland, David Fried et al. · 2012 · 89 citations

Engineering, Computer Engineering, Electrical Engineering +17

A manufacturable dual channel (Si and SiGe) high-k metal gate CMOS technology with multiple oxides for high performance and low power applications

Siddarth Krishnan, U. Kwon, N. Moumen et al. · 2011 · 81 citations

Engineering, Computer Engineering, Electrical Engineering +17

A 7nm CMOS technology platform for mobile and high performance compute application

B. Jagannathan, Akihisa Ogino, D. Jaeger et al. · 2017 · 60 citations

Engineering, Computer Engineering, Electrical Engineering +14

Scaling of 32nm low power SRAM with high-K metal gate

Haining Yang, Robert Wong, R. Hasumi et al. · 2008 · 50 citations

Engineering, Computer Engineering, Electrical Engineering +16