Sharon Pei-Siang Lim

Author

Also Known As

S Lim, S. Lim, S.P.-S. Lim, Sharon Lim, Sharon P. S. Lim, Sharon Pei-Siang LIM, Sharon Pei-Siang Lim, Sharon PeiSiang Lim

Publications

342

Citations

H-Index

Concepts

All Affiliations

Institute of Microelectronics Agency for Science, Technology and Research Singapore Science Park Infineon Technologies (Singapore)Medtronic (United States)

About

Sharon Pei-Siang Lim is an author at Institute of Microelectronics specializing in microelectronics, electronic packaging, and engineering.

Top Concepts

#	Concept	H-Index	Publications	Citations
1	Engineering	10	11	283
2	Applied Physics	6	6	103
3	Electrical Engineering	6	6	200
4	Computer Engineering	2	2	134
5	Biomedical Engineering	1	1	16

Sharon Pei-Siang Lim

Publications

283

Citations

H-Index

Page 1

	Year	Citations
Development of 3-D Silicon Module With TSV for System in Packaging Navas Khan, V. S. Rao, Sharon Pei-Siang Lim, IEEE Transactions on Components and Packaging Technologies EngineeringRadio FrequencyIntegrated CircuitsInterconnect (Integrated Circuits)Advanced Packaging (Semiconductors)	2010	119
Process Development and Reliability of Microbumps Sharon Pei-Siang Lim, Vempati Srinivasa Rao, Wai Yin Hnin, IEEE Transactions on Components and Packaging Technologies EngineeringMechanical EngineeringAssembly Process DevelopmentProcess DevelopmentWafer Scale Processing	2010	28
An investigation on the plasma treatment of integrated circuit bond pads Y. F. Chong, R. Gopalakrishnan, C.F. Tsang, Microelectronics Reliability Electrical EngineeringEngineeringNonthermal PlasmaApplied PhysicsPlasma Treatment	2000	25
Influence of Bump Geometry, Adhesives and Pad Finishings on the Joint Resistance of Au Bump and A/NCA Flip Chip Interconnection Tan Min, Sharon Pei-Siang Lim, Anders Yeo, EngineeringMechanical EngineeringAdvanced Packaging (Semiconductors)Bump GeometryElectronic Packaging	2006	16
Numerical modeling of through silicon via (TSV) stacked module with micro bump interconnect for biomedical device Chee Houe Khong, Xiaowu Zhang, Navas Khan, Offset DistanceEngineeringMechanical EngineeringBiomedical EngineeringIntegrated Circuits	2010	16
Structure Design Optimization and Reliability Analysis on a Pyramidal-Shape Three-Die-Stacked Package With Through-Silicon Via Sharon Pei-Siang Lim, T.C. Chai, Xiaowu Zhang IEEE Transactions on Device and Materials Reliability EngineeringMechanical EngineeringThrough-silicon ViaAdvanced Packaging (Semiconductors)Electronic Packaging	2011	15
Design and Development of Multi-Die Laterally Placed and Vertically Stacked Embedded Micro-Wafer-Level Packages Gaurav Sharma, Vempati Srinivas Rao, Aditya Kumar, IEEE Transactions on Components Packaging and Manufacturing Technology EngineeringIntegrated CircuitsThin Die StackingMicro-wafer-level PackagesMulti-chip Emwlp	2010	15
Re-thinking the robust control of robot manipulators D.M. Dawson, Zhihua Qu, Sharon Pei-Siang Lim Robot KinematicsMotion ControlRobot ControlRobotic SystemsRobust Controllers	2002	15
Development of solder replacement flip chip using anisotropic conductive adhesives Tan Min, Sharon Pei-Siang Lim, C. Lee Materials ScienceAdvanced PackagingMaterials EngineeringDie Shear StrengthEngineering	2004	12
Thermal Compression Bonding of 30um Pitch Cu Pillar Microbump on Organic Substrate with Bare Cu Bondpad K. Y. Au, Jong‐Kai Lin, Hsiao Hsiang-Yao, EngineeringCu PillarMechanical EngineeringThermal Compression BondingInterconnect (Integrated Circuits)	2016	12

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