H. Ng

High performance CMOS fabricated on hybrid substrate with different crystal orientations

Min Yang, M. Ieong, L. Shi et al. · 2004 · 90 citations

Engineering, Electrical Engineering, Microelectronics +14

High-performance sub-0.08 μm CMOS with dual gate oxide and 9.7 ps inverter delay

M. Hargrove, S. Crowder, E. Nowak et al. · 2002 · 46 citations

Engineering, Electrical Engineering, Microelectronics +15

Advanced gate stacks with fully silicided (FUSI) gates and high-/spl kappa/ dielectrics: enhanced performance at reduced gate leakage

E. P. Gusev, C. Cabral, Y.H. Kim et al. · 2004 · 28 citations

Engineering, Electrical Engineering, Materials Science +17

A high-performance sub-0.25 μm CMOS technology with multiple thresholds and copper interconnects

L.T. Su, R. Schulz, J. Adkisson et al. · 2002 · 26 citations

Engineering, Computer Engineering, Electrical Engineering +17

Design of high performance PFETs with strained si channel and laser anneal

Z. Luo, Y. F. Chong, J. Kim et al. · 2006 · 23 citations

Engineering, Electrical Engineering, Materials Science +14