J. Kim

Spin-transfer torque MRAM with reliable 2 ns writing for last level cache applications

G. Hu, J. Nowak, M. Gottwald et al. · 2019 · 52 citations

Engineering, Computer Engineering, Electrical Engineering +17

Microstructure evolution during electroless copper deposition

J. Kim, Shao‐zhen Wen, D.-Y. Jung et al. · IBM Journal of Research and Development · 1984 · 37 citations

Natural Sciences, Materials Engineering, Materials Science +17

2X reduction of STT-MRAM switching current using double spin-torque magnetic tunnel junction

G. Hu, G. Lauer, J. Z. Sun et al. · 2021 IEEE International Electron Devices Meeting (IEDM) · 2021 · 32 citations

Natural Sciences, Electrical Engineering, Materials Science +16

Stress Proximity Technique for Performance Improvement with Dual Stress Liner at 45nm Technology and Beyond

X. Chen, S. Fang, Wenli Gao et al. · 2006 · 25 citations

Engineering, Electrical Engineering, Materials Science +12

A 243-GHz<tex>$F_t$</tex>and 208-GHz<tex>$F_max$</tex>, 90-nm SOI CMOS SoC Technology With Low-Power mmWave Digital and RF Circuit Capability

Jean‐Olivier Plouchart, N. Zamdmer, J. Kim et al. · IEEE Transactions on Electron Devices · 2005 · 24 citations

Engineering, Electrical Engineering, Microelectronics +16