Jean‐Olivier Plouchart

Author

IBM Research - Thomas J. Watson Research Center ORCID

Also Known As

J O Plouchart, J. O. PLOUCHART, J. Plouchart, J.-O Plouchart, J.-O. Plouchart, J.O. Plouchart, Jean-Olivier Plouchart, Jean-olivier Plouchart, Jean‐Olivier Plouchart, Plouchart, J.O.

125

Publications

3.3K

Citations

H-Index

Concepts

All Affiliations

IBM Research - Thomas J. Watson Research Center IBM (United States)Carleton University Carnegie Mellon University University of Minnesota

About

Jean‐Olivier Plouchart is an author at IBM Research - Thomas J. Watson Research Center specializing in engineering, microelectronics, and electrical engineering.

Top Concepts

#	Concept	H-Index	Publications	Citations
1	Engineering	31	69	3K
2	Computer Engineering	25	45	2K
3	Applied Physics	7	7	373
4	Education	5	5	230
5	Management	1	1	16

Jean‐Olivier Plouchart

Publications

3.1K

Citations

H-Index

Page 1

	Year	Citations
Frequency-independent equivalent-circuit model for on-chip spiral inductors Yu Cao, R. Groves, Xuejue Huang, IEEE Journal of Solid-State Circuits Rlc Circuit ElementsElectrical EngineeringEngineeringNonlinear CircuitHigh-frequency Device	2003	371
Design of wide-band cmos vco for multiband wireless lan applications N. Fong, Jean‐Olivier Plouchart, N. Zamdmer, IEEE Journal of Solid-State Circuits Electrical EngineeringEngineeringCircuit SystemOscillatorsBest Phase Noise	2003	190
Record RF performance of 45-nm SOI CMOS Technology Sungjae Lee, B. Jagannathan, Shreesh Narasimha, Electrical EngineeringEngineeringVlsi DesignRf SemiconductorHigh-frequency Device	2007	179
A 1-V 3.8-5.7-GHz wide-band VCO with differentially tuned accumulation MOS varactors for common-mode noise rejection in CMOS SOI technology N. Fong, Jean‐Olivier Plouchart, N. Zamdmer, IEEE Transactions on Microwave Theory and Techniques Accumulation Mos VaractorsCommon-mode Noise RejectionElectrical EngineeringEngineeringVlsi Design	2003	95
A 24–30-GHz 256-Element Dual-Polarized 5G Phased Array Using Fast On-Chip Beam Calculators and Magnetoelectric Dipole Antennas Bodhisatwa Sadhu, Arun Paidimarri, Duixian Liu, IEEE Journal of Solid-State Circuits Wireless CommunicationsElectrical EngineeringLiquid Crystal PolymerEngineeringRadio Frequency	2022	92
Modeling of Variation in Submicrometer CMOS ULSI Technologies S. Springer, Sunghoon Lee, Ning Lu, IEEE Transactions on Electron Devices EngineeringVlsi DesignMeasurementTransistor Response DifferencesEducation	2006	79
Frequency-independent equivalent circuit model for on-chip spiral inductors Yu Cao, R. Groves, N. Zamdmer, Frequency-independent Rlc ElementsElectrical EngineeringEngineeringNonlinear CircuitHigh-frequency Device	2003	74
A linearized, low-phase-noise VCO-based 25-GHz PLL with autonomic biasing Bodhisatwa Sadhu, Mark Ferriss, Arun Natarajan, IEEE Journal of Solid-State Circuits Low-power ElectronicsElectrical EngineeringEngineeringVlsi DesignTransconductance Linearization	2013	72
Bang-bang digital PLLs at 11 and 20GHz with sub-200fs integrated jitter for high-speed serial communication applications Alexander Rylyakov, J. Tierno, H. Ainspan, Electrical EngineeringSub-200fs Integrated JitterLimit CycleVlsi DesignBounded Limit Cycle	2009	71
A fully-integrated dual-polarization 16-element W-band phased-array transceiver in SiGe BiCMOS Alberto Valdes‐Garcia, Arun Natarajan, Duixian Liu, RadarDual OutputsEngineeringRadio EngineeringRadio Frequency	2013	68

Page 1