Satoru Mayuzumi

Process integration of a 27nm, 16Gb Cu ReRAM

J. Zahurak, Koji Miyata, Mark H. Fischer et al. · 2014 · 54 citations

Materials Science, Electrical Engineering, Wafer Scale Processing +13

Channel strain analysis in high-performance damascene-gate p-metal-oxide-semiconductor field effect transistors using high-spatial resolution Raman spectroscopy

Munehisa Takei, Daisuke Kosemura, Kohki Nagata et al. · Journal of Applied Physics · 2010 · 30 citations

Semiconductor Technology, Electrical Engineering, Channel Strain Analysis +10

High-Performance Metal/High-$k$ n- and p-MOSFETs With Top-Cut Dual Stress Liners Using Gate-Last Damascene Process on (100) Substrates

Satoru Mayuzumi, Shinya Yamakawa, Y. Tateshita et al. · IEEE Transactions on Electron Devices · 2009 · 23 citations

Materials Science, Electrical Engineering, Engineering +11

Extreme High-Performance n- and p-MOSFETs Boosted by Dual-Metal/High-k Gate Damascene Process using Top-Cut Dual Stress Liners on (100) Substrates

Satoru Mayuzumi, J. Wang, Shuji Yamakawa et al. · 2007 · 18 citations

Materials Science, Semiconductor Technology, Electrical Engineering +14

Channel-Stress Enhancement Characteristics for Scaled pMOSFETs by Using Damascene Gate With Top-Cut Compressive Stress Liner and eSiGe

Satoru Mayuzumi, Shinya Yamakawa, Daisuke Kosemura et al. · IEEE Transactions on Electron Devices · 2009 · 15 citations

Device Modeling, Semiconductor Technology, Electrical Engineering +13