D. Mosher

High-voltage drain extended MOS transistors for 0.18-μm logic CMOS process

J. Mitros, Chin-Yu Tsai, H. Shichijo et al. · IEEE Transactions on Electron Devices · 2001 · 91 citations

Low-power Electronics, Electrical Engineering, High-voltage Drain +10

off-State Degradation in Drain-Extended NMOS Transistors: Interface Damage and Correlation to Dielectric Breakdown

Dhanoop Varghese, Haldun Küflüoğlu, V. Reddy et al. · IEEE Transactions on Electron Devices · 2007 · 79 citations

Electrical Engineering, Engineering, Nanoelectronics +12

A comprehensive analysis of off-state stress in drain extended PMOS transistors: Theory and characterization of parametric degradation and dielectric failure

Dhanoop Varghese, V. Reddy, H. Shichijo et al. · 2008 · 24 citations

Device Modeling, Pmos Transistors, Electrical Engineering +15

A 65 nm CMOS technology for mobile and digital signal processing applications

A. Chattedee, J. Yoon, Song Zhao et al. · 2005 · 22 citations

Low-power Electronics, Hardware Security, Electrical Engineering +14

Self-aligned RESURF to LOCOS region LDMOS characterization shows excellent R/sub sp/ vs BV performance

T. Efland, P. Mei, D. Mosher et al. · 2002 · 21 citations

Self-aligned Resurf 60, Electrical Engineering, Experimental Development +12