P. Mei

Integration of unit processes in a shallow trench isolation module for a 0.25 μm complementary metal–oxide semiconductor technology

Amitava Chatterjee, Inayat Ali, K. Joyner et al. · Journal of Vacuum Science & Technology B Microelectronics and Nanometer Structures Processing Measurement and Phenomena · 1997 · 27 citations

Unit Processes, Electrical Engineering, Engineering +11

Self-aligned RESURF to LOCOS region LDMOS characterization shows excellent R/sub sp/ vs BV performance

T. Efland, P. Mei, D. Mosher et al. · 2002 · 21 citations

Self-aligned Resurf 60, Electrical Engineering, Experimental Development +12

A shallow trench isolation for sub-0.13 μm CMOS technologies

M. Nandakumar, S. Sridhar, Soumya Shubhra Nag et al. · 2002 · 13 citations

Low-power Electronics, Electrical Engineering, Ion Implantation +11

Single-Pole Double-Throw Switch Using Stacked-FET Configuration at Millimeter Wave Frequencies

P. Mei, Guan-Wei Wu, Heng-Shou Hsu et al. · 2018 · 13 citations

Electrical Engineering, Millimeter Wave Technology, Engineering +13

A high performance 30 V extended drain RESURF CMOS device for VLSI intelligent power applications

P. Mei, K. Fujikura, T. Fawano et al. · 2002 · 11 citations

Low-power Electronics, Extended Drain, Electrical Engineering +11