S. Borel - Concepedia

Author

S. Borel

Commissariat à l'Énergie Atomique et aux Énergies Alternatives ORCID

Also Known As

S BOREL, S Borel, S. Borel, Stephan Borel, Stéphan BOREL, Stéphan Borel

Publications

658

Citations

H-Index

Concepts

All Affiliations

Commissariat à l'Énergie Atomique et aux Énergies Alternatives CEA Grenoble Laboratoire d'Électronique des Technologies de l'Information Université Grenoble Alpes STMicroelectronics (France)

About

S. Borel is an author at Commissariat à l'Énergie Atomique et aux Énergies Alternatives specializing in engineering, applied physics, and microelectronics.

Top Concepts

#	Concept	H-Index	Publications	Citations
1	Engineering	16	19	542
2	Applied Physics	14	15	435
3	Chemical Engineering	4	4	80
4	Computer Engineering	2	2	45
5	Natural Sciences	1	1	19

S. Borel

Publications

581

Citations

H-Index

Page 1

	Year	Citations
Novel 3D integration process for highly scalable Nano-Beam stacked-channels GAA (NBG) FinFETs with HfO2/TiN gate stack T. Ernst, C. Dupré, Christian Isheden, EngineeringHfo2/tin Gate StackFinfet ProcessSemiconductor MaterialsIntegrated Circuits	2006	61
Highly performant double gate MOSFET realized with SON process S. Harrison, P. Coronel, F. Leverd, Electrical EngineeringEngineeringSon ProcessHigh Ion/ioff TradeNanoelectronics	2004	54
Hydrogen annealing of arrays of planar and vertically stacked Si nanowires E. Dornel, T. Ernst, J.-Ch. Barbé, Applied Physics Letters EngineeringNanodevicesSi NanowiresSilicon On InsulatorSuspended Nanowires	2007	50
Emerging silicon-on-nothing (SON) devices technology S. Monfray, T. Skotnicki, C. Fenouillet-Béranger, Solid-State Electronics Electrical EngineeringEngineeringDevices TechnologyDevice IntegrationMicrofabrication	2004	48
Isotropic etching of SiGe alloys with high selectivity to similar materials S. Borel Microelectronic Engineering Materials EngineeringMaterials ScienceEngineeringMicrofabricationApplied Physics	2004	35
Three-dimensional hybrid bonding integration challenges and solutions toward multi-wafer stacking L. Arnaud, C. Karam, N. Bresson, MRS Communications Materials Science3D Ic ArchitectureWafer Scale ProcessingEngineeringAdvanced Packaging (Semiconductors)	2020	34
3D nanowire gate-all-around transistors: Specific integration and electrical features C. Dupré, T. Ernst, V. Maffini-Alvaro, Solid-State Electronics Electrical EngineeringEngineeringNanoelectronicsApplied PhysicsNanocomputing	2007	30
High pressure<i>in situ</i>HCl etching of Si<sub>1−</sub><i><sub>x</sub></i>Ge<i><sub>x</sub></i>versus Si for advanced devices V. Destefanis, Jean‐Michel Hartmann, S. Borel, Semiconductor Science and Technology Materials ScienceChemical EngineeringEngineeringSurface ScienceApplied Physics	2008	26
A Novel Structure for Backside Protection Against Physical Attacks on Secure Chips or SiP S. Borel, L. Duperrex, Edouard Deschaseaux, Hardware TrojanEngineeringInformation SecurityComputer ArchitectureIntegrated Circuits	2018	26
Mechanisms of isotropic and selective etching between SiGe and Si V. Caubet, Charlotte Beylier, S. Borel, Journal of Vacuum Science & Technology B Microelectronics and Nanometer Structures Processing Measurement and Phenomena EngineeringSelective EtchingSige IsotropicIntegrated CircuitsSilicon On Insulator	2006	22

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